In current display industries such as the projector industry, there is a growing demand for providing networking capabilities in display devices while minimizing the overall system cost.
Current display devices are often equipped with an application-specific-integrated-circuit (ASIC) for performing display system control and data processing, such as video, image, and graphics (hereafter video/image) data processing of video/image inputs, a flash-memory for storing system codes and configuration data, and a low-latency memory for storing real-time video/image data (often referred to as video memory). The ASIC typically comprises a microprocessor for executing software codes that are stored in the flash memory or in another low-latency memory. The microprocessor in the ASIC typically has access to a low-latency memory that stores the real-time video/image data.
In general, a low-latency memory is much more expensive than a flash memory; and an on-chip low-latency memory is considerably more expensive than an off-chip low-latency memory. An on-chip memory (e.g. a low-latency memory, a cache, and a flash memory) is referred to as a memory that is embedded within the ASIC; while an off-chip memory is referred to as a memory that is separate from the ASIC.
Adding network capability on a display device designed with existing ASICs is normally accompanied by the addition of another microprocessor, microcontroller, or a signal controller (e.g. a network controller) and low-latency memories to support the necessary networking functionality, which in turn, increases the overall system cost, such as the bill-of-material (BOM) cost, the original-design-manufacture (ODM) cost, and the original-equipment-manufacture (OEM) cost.
Therefore, what is desired is a display device with embedded reliable and robust networking capability at minimized system cost.